EU project Tulipp demonstrates low-power vision-based systems

July 11, 2019 //By Julien Happich
Tulipp
Concluding three years of research, the Tulipp (Towards Ubiquitous Low-power Image Processing Platforms) Consortium is announcing its results with the release of a comprehensive reference platform.

The Tulipp reference platform enables computer vision product designers to readily address the combined challenges of low power, low latency, high performance and real-time image processing design constraints. It includes a full development kit, comprising an FPGA-based embedded, multicore computing board, parallel real-time operating system and development tool chain with guidelines, coupled with ‘real world’ use cases focusing on diverse applications such as medical x-ray imaging, driver assistance and autonomous drones with obstacle avoidance. The complete Tulipp ecosystem was demonstrated earlier in the year to vision-based system designers in a series of hands-on tutorials.

“The Tulipp project has achieved all of its objectives,” said Philippe Millet of Thales and Tulipp’s Project Co-ordinator. “By taking a diverse range of application domains as the basis for defining a common reference processing platform that captures the commonality of real-time, high-performance image processing and vision applications, it has successfully addressed the fundamental challenges facing today’s embedded vision-based system designers.”

Developed by Sundance Multiprocessor Technology, each instance of the Tulipp processing platform is 40x50mm and is compliant with the PC/104 embedded processor board standard. The hardware platform utilizes the powerful multicore Xilinx Zynq Ultrascale+ MPSoC which contains, along with the Xilinx FinFET+ FPGA, an ARM Cortex-A53 quad-core CPU, an ARM Mali-400 MP2 Graphics Processing Unit (GPU), and a real-time processing unit (RPU) containing a dual-core ARM Cortex-R5 32-bit real-time processor based on the ARM-v7R architecture. A separate expansion module (VITA57.1 FMC) allows application-specific boards with different flavours of input and output interfaces to be created while keeping the interfaces with the processing module consistent.


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